From d6a07c3b69f272b18f156f16e1dac70423ca446b Mon Sep 17 00:00:00 2001 From: "djm@djmnc4000.(none)" Date: Tue, 5 Apr 2005 15:58:08 +0000 Subject: [PATCH] bitkeeper revision 1.1236.59.3 (4252b590LO54UKkVePo_Yhb6PbX72g) ia64: Minor cleanup --- xen/arch/ia64/domain.c | 3 ++- xen/include/asm-ia64/vhpt.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/ia64/domain.c b/xen/arch/ia64/domain.c index 96f9374083..35e0cfba59 100644 --- a/xen/arch/ia64/domain.c +++ b/xen/arch/ia64/domain.c @@ -246,13 +246,14 @@ void new_thread(struct exec_domain *ed, #endif regs = (struct pt_regs *) ((unsigned long) ed + IA64_STK_OFFSET) - 1; sw = (struct switch_stack *) regs - 1; + memset(sw,0,sizeof(struct switch_stack)+sizeof(struct pt_regs)); new_rbs = (unsigned long) ed + IA64_RBS_OFFSET; regs->cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BITS_TO_SET | IA64_PSR_BN & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_RI | IA64_PSR_IS); regs->cr_ipsr |= 2UL << IA64_PSR_CPL0_BIT; // domain runs at PL2 regs->cr_iip = start_pc; - regs->ar_rsc = 0xf; /* eager mode, privilege level 1 */ + regs->ar_rsc = 0; /* lazy mode */ regs->ar_rnat = 0; regs->ar_fpsr = sw->ar_fpsr = FPSR_DEFAULT; regs->loadrs = 0; diff --git a/xen/include/asm-ia64/vhpt.h b/xen/include/asm-ia64/vhpt.h index 6fffb1500a..e4268f0947 100644 --- a/xen/include/asm-ia64/vhpt.h +++ b/xen/include/asm-ia64/vhpt.h @@ -135,7 +135,7 @@ struct vhpt_lf_entry { // VHPT_CCHAIN_LOOKUP is intended to run with psr.i+ic off #define VHPT_CCHAIN_LOOKUP(Name, i_or_d) \ \ -Name:; \ +CC_##Name:; \ mov r31 = pr; \ mov r16 = cr.ifa; \ movl r30 = int_counts; \ -- 2.30.2